Reliable Energy-Efficient Routing Algorithm for Vehicle-Assisted Wireless Ad-Hoc Networks

We investigate the design of the optimal routing path in a moving vehicles involved the internet of things (IoT). In our model, jammers exist that may interfere with the information exchange between wireless nodes, leading to worsened quality of service (QoS) in communications. In addition, the transmit power of each battery-equipped node is constrained to save energy. We propose a three-step optimal routing path algorithm for reliable and energy-efficient communications. Moreover, results show that with the assistance of moving vehicles, the total energy consumed can be reduced to a large extend. We also study the impact on the optimal routing path design and energy consumption which is caused by path loss, maximum transmit power constrain, QoS requirement, etc.Comment: 6 pages, 5 figures, rejected by IEEE Globecom 2017,resubmit to IEEE WCNC 201

Ixazomib enhances parathyroid hormone-induced β-catenin/T-cell factor signaling by dissociating β-catenin from the parathyroid hormone receptor.

The anabolic action of PTH in bone is mostly mediated by cAMP/PKA and Wnt-independent activation of β-catenin/T-cell factor (TCF) signaling. β-Catenin switches the PTH receptor (PTHR) signaling from cAMP/PKA to PLC/PKC activation by binding to the PTHR. Ixazomib (Izb) was recently approved as the first orally administered proteasome inhibitor for the treatment of multiple myeloma; it acts in part by inhibition of pathological bone destruction. Proteasome inhibitors were reported to stabilize β-catenin by the ubiquitin-proteasome pathway. However, how Izb affects PTHR activation to regulate β-catenin/TCF signaling is poorly understood. In the present study, using CRISPR/Cas9 genome-editing technology, we show that Izb reverses β-catenin-mediated PTHR signaling switch and enhances PTH-induced cAMP generation and cAMP response element-luciferase activity in osteoblasts. Izb increases active forms of β-catenin and promotes β-catenin translocation, thereby dissociating β-catenin from the PTHR at the plasma membrane. Furthermore, Izb facilitates PTH-stimulated GSK3β phosphorylation and β-catenin phosphorylation. Thus Izb enhances PTH stimulation of β-catenin/TCF signaling via cAMP-dependent activation, and this effect is due to its separating β-catenin from the PTHR. These findings provide evidence that Izb may be used to improve the therapeutic efficacy of PTH for the treatment of osteoporosis and other resorptive bone diseases

A multiple frequency clock generator using wide operation frequency range phase interpolator

[[abstract]]This paper presents a multiple frequency clock generator that is composed of the wide operation frequency range phase interpolator and the phase combiner. The wide operation frequency range phase interpolator is developed using a delay-time-adjustment phase interpolator (DTAPI) circuit with various oscillation frequencies for different clock domain applications. The phase combiner generates multiple clock frequencies through various phase combination inputs generated by the preceding proposed phase interpolators. The varying output transition delay time of the proposed DTAPI is the result of the various oscillation frequencies of the voltage-controlled oscillator. The test chip was fabricated in a 0.18 μm CMOS process with a 1.8 V supply voltage. The measured phase noise and power dissipation are −87.28 dBc/Hz at 1 MHz offset frequency from 88.8 MHz and 1.32 mW, −77.47 dBc/Hz and 2.06 mW from 797.8 MHz, respectively. The duty cycle error rate of the output clock frequency is less than 1.5%.[[notice]]補正完畢[[incitationindex]]SCI[[booktype]]紙

Analysis and Design Considerations of Static CMOS Logics under Process, Voltage and Temperature Variation in 90nm Process

[[abstract]]In this paper, we analyze the circuit characteristic of static CMOS logics and provide the size ratio of PMOS to NMOS transistors under process, voltage and temperature (PVT) variations in 90nm CMOS process. The threshold voltage of a MOS transistor is influenced seriously under PVT variations in ultralow voltages. The performances of the static CMOS logics are unstable under those conditions. To find the best size ratio region of PMOS to NMOS transistors, NOT, NAND, NOR, and XOR gates are simulated with various PVT conditions. Four kinds of gates are designed by different ratios respectively to compose the ring oscillators. By examining operating frequency, then we analyze the change of current according to various channel length and PVT conditions. By further analyzing the simulation results, if the channel length of MOS transistors is shorter than 200nm, or the operating voltage is lower than 0.5V, then the performance of MOS transistors is unstable in 90nm CMOS process. Through the data and the simulation provided by this paper, we can design the circuits with different needs, and we can also understand how each different section of PVT variations will affect the circuit in 90nm CMOS process.[[sponsorship]]IEEE Sapporo Section, Japan; Xiamen University[[conferencetype]]國際[[conferencedate]]20140426~20140428[[booktype]]電子版[[iscallforpapers]]Y[[conferencelocation]]Sapporo City, Hokkaido, Japa

A 300mV 10MHz 4kb 10T Subthreshold SRAM for Ultralow-Power Application

[[notice]]缺頁數[[conferencetype]]國際[[conferencedate]]20121104~20121107[[booktype]]電子版[[iscallforpapers]]Y[[conferencelocation]]New Taipei City, Taiwa

Temperature Insensitive Current Reference for the 6.27 MHz Oscillator

[[abstract]]This paper describes a circuit, which generates temperature-independent bias currents. In this paper, low- temperature coefficient reference is presented. The circuit is firstly employed to generate a current reference with temperature compensation, then combining the opposite characteristic curve current reference to minimize the variation of temperature. The proposed circuit has been design by a 0.18um CMOS technology process and using computer simulation to evaluate the thermal drift of the reference current. This current reference is used to provide a stable current for a current controlled oscillator(CCO). The proposed CCO achieves temperature coefficients of 22.3 ppm/c in the temperature range between -25 and 75c.[[conferencetype]]國際[[conferencedate]]20111212~20111214[[conferencelocation]]Singapore, Republic of Singapor

Low-Power Fast-Settling Low-Dropout Regulator Using a Digitally Assisted Voltage Accelerator for DVFS Application

[[abstract]]This paper presents a low-power fast-settling low-dropout regulator (LDO) using a digitally assisted voltage accelerator. Using the selectable-voltage control technique and digitally assisted voltage accelerator significantly improves the transition response time within output voltage switched. The proposed LDO regulator uses the selectable-voltage control technique to provide two selectable-voltage outputs of 2.5 V and 1.8 V. Using the digitally assisted voltage accelerator when the output voltage is switched reduces the settling time. The simulation results show that the settling time of the proposed LDO regulator is significantly reduced from 4.2 ms to 15.5 μs. Moreover, the selectable-voltage control unit and the digitally assisted voltage accelerator of the proposed LDO regulator consume only 0.54 mW under a load current of 100 mA. Therefore, the proposed LDO regulator is suitable for low-power dynamic voltage and frequency-scaling applications.[[notice]]補正完畢[[incitationindex]]EI[[booktype]]紙